The efficient operation of light emitting diode (LED) circuits in LED dimming applications requires a precise pulsating current. LED dimming systems that have a high dimming ratio require a precise pulsating current signal that has a very fast rise time and a very fast fall time. The rate of the rise of the current signal (and the rate of the fall of the current signal) is sometimes referred to as a slew rate. It is desirable to have a slew rate that is as large as possible (i.e., to have rise times and fall times that are as short as possible).
FIG. 1 illustrates a schematic diagram 100 of a prior art circuit for generating a precise pulsating current output for a plurality of light emitting diodes. A direct current (DC) to direct current (DC) power converter circuit 110 is employed to provide a pulsating current output to the light emitting diodes 120. As shown in FIG. 1, the light emitting diodes 120 are connected in series. The first LED is designated with reference numeral 120a, the second LED is designated with reference numeral 120b, and so on. The output current IOUT passes to ground through a sense resistor (designated RISNS).
The DC-DC power converter circuit 110 comprises a power stage unit 130, an error amplifier 140, and a voltage reference source 150 connected together as shown in FIG. 1. The power stage unit 130 provides supply rail and regulation with respect to the output current IOUT. A feedback signal from feedback node VFB is provided to the error amplifier 140 to enable the power stage unit 130 to regulate the value of the output current IOUT.
A pulse width modulated (PWM) input signal is provided to the power stage unit 130 through an enable (EN) port. The duty cycle of the pulsating output current IOUT is controlled by turning the power stage unit 130 on and off.
The DC-DC power converter circuit 110 shown in FIG. 1 provides a high power efficiency. However, the output current rise times (and fall times) are limited by the operation of an inductor and output capacitor (not shown in FIG. 1). The output current rise time (and output current fall time) that is achievable by the DC-DC power converter circuit 110 ranges from tens of microseconds to hundreds of microseconds.
FIG. 2 illustrates a schematic diagram 200 of another prior art circuit for generating a precise pulsating current output for a plurality of light emitting diodes. A direct current (DC) to direct current (DC) power converter circuit 210 is employed to provide a supply rail to a linear constant current controller 230. As shown in FIG. 2, the output of the DC-DC power converter 210 is connected to a plurality of light emitting diodes 220.
The light emitting diodes 220 are connected in series. The first LED is designated with reference numeral 220a, the second LED is designated with reference numeral 220b, and so on. The output current IOUT through the light emitting diodes 220 is connected to the linear constant current controller 230 through an input port that is designated with the letters OUT.
A reference current source 240 is connected to the linear constant current controller 230. The reference current source 240 provides a reference current (designated IREF) to the linear constant current controller 230 through an input port that is designated with the letters IREFIN. A typical value of the reference current IREF is forty-four microamperes (44 μA). The linear constant current controller 230 receives the reference current IREF as input and then outputs the output current IOUT. The output current IOUT is equal to an integer value (designated by the letter M) times the input current IREF. That is, IOUT equals M times IREF.
A pulse width modulated (PWM) input signal is provided to the linear constant current controller 230 through an input port that is designated with the letters PWMIN. The duty cycle of the pulsating output current IOUT is controlled by turning the linear constant current controller 230 on and off.
FIG. 3 illustrates a more detailed schematic diagram 300 of the prior art linear constant current controller 230 that is shown in FIG. 2. The input node IREFIN that receives the input reference current IREF from the input reference source 240 is connected to a first end of a sense resistor 310 (designated “RISNS*M” where M is the previously mentioned integer value). A typical value of the sense resistor 310 is four thousand five hundred ohms (4500Ω). A second end of the sense resistor 310 is connected to ground. The input node IREFIN is also connected to a non-inverting input (designated +) of an operational transconductance amplifier (OTA) 320. A feedback signal line 330 is connected to the inverting input (designated −) of the OTA 320. The OTA 320 has a high input impedance and a high output impedance.
When the reference current IREF (that defines the value of the output current IOUT) is provided to the IREFIN node, a reference voltage (designated VREF) is developed as a reference voltage for the OTA 320. The reference voltage VREF is equal to the product of the reference current IREF and the resistance (RISNS*M) of sense resistor 310.
The output of the OTA 320 is connected to an input of a unity gain voltage buffer 340. The unity gain voltage buffer 340 has a high input impedance and a low output impedance. The output of the unity gain voltage buffer 340 is connected to the gate of an n-channel field effect transistor (NFET) 350. As shown in FIG. 3, the drain of NFET 350 is connected to the output node OUT and the source of the NFET 350 is connected to ground through a sense resistor 360 (designated RISNS). A typical value of the sense resistor 360 is five ohms (5Ω). The resistance value of the sense resistor 310 is M times the resistance value of the sense resistor 360. The source of NFET 350 is also connected to the inverting input of the OTA 320 through feedback signal line 330.
The pulse width modulated (PWM) input signal that is provided to the linear constant current controller 230 through the PWMIN input port is connected to an inverter circuit 370. The output of the inverter circuit 370 controls a switch 380. A first end of the switch 380 is connected between the output of the OTA 320 and the input of the unity gain buffer 340. A second end of the switch 380 is connected to ground.
When the pulse width modulated (PWM) input signal at the PWMIN node goes high, the inverter 370 outputs a low signal that opens the switch 380. When the switch 380 is opened, the output of the OTA 320 is provided to the unity gain buffer 340. When the pulse width modulated (PWM) input signal at the PWMIN node goes low, the inverter 370 outputs a high signal that closes the switch 380. When the switch 380 is closed, the output of the OTA 320 is connected to ground.
As also shown in FIG. 3, the output of the OTA 320 is connected to a first end of a compensation resistor 390 (designated with the letters RC). A typical value of the compensation resistor 390 is ten thousand ohms (10 kΩ). The second end of the compensation resistor 390 is connected to a first end of a compensation capacitor 395 (designated with the letters CC). A typical value of the compensation capacitor 395 is four picofarads (4 pF). The second end of the compensation capacitor 395 is connected to ground.
The switch 380 operates in response to the pulse width modulated (PWM) input signal that is provided to the linear constant current controller 230 through the PWMIN input port. The pulse width modulated (PWM) input signal is passed through the inverter circuit 370.
The reference current IREF from the reference current source 240 is provided to the linear constant current controller 230 at the IREFIN node. The reference current IREF through sense transistor 310 creates a reference voltage VREF at the non-inverting input of the operational transconductance amplifier (OTA) 320. The pulse width modulation logic signal (PWM) is provided to the linear constant current controller 230 at the PWMIN node.
When the logic signal PWM is high, then the switch 380 opens. This provides the output of the OTA 320 to the unity gain buffer 340. When the logic signal PWM is low, then the switch 380 closes. This connects the output of the OTA 320 to ground.
After the compensation capacitor 395 has been charged up during the first PWM pulse the VC voltage decreases during the next cycle. Therefore, the compensation capacitor 395 needs to be recharged during the subsequent PWM pulses.
As previously mentioned, the output current IOUT is equal to M times the input reference current IREF. The output current IOUT is regulated when the logic signal PWM is high. The sense voltage (designated VSNS) across the sense resistor 360 is equal to the reference voltage VREF when the output current IOUT is regulated.
The linear constant current controller 230 shown in FIG. 2 and in FIG. 3 provides an output current rise time (and an output current fall time) that ranges from hundreds of nanoseconds to thousands of nanoseconds. However, the output current rise time is limited by the time that is required to charge up the compensation capacitor 395 for regulation. This means that prior art linear constant current controller 230 is not capable of achieving an output current rise time that is in the tens of nanoseconds.
Therefore, there is a need in the art for a system and method that is capable of providing a pulsating current output having ultra fast rise and fall times. In particular, there is a need in the art for a system and method that is capable of providing output current rise and fall times that are in the tens of nanoseconds.
An advantageous embodiment of the system and method of the present invention provides a pulsating current output that has ultra fast rise and fall times. A linear constant current controller is provided that comprises an operational amplifier. A compensation capacitor is connected to an output of the operational amplifier through a VC switch circuit. The VC switch circuit closes to initially charge up the compensation capacitor. The VC switch circuit then opens to isolate the compensation capacitor when the output of the operational amplifier is connected to ground. A value of voltage is maintained on the compensation capacitor so that the compensation capacitor does not need to be recharged for each subsequent cycle of the pulsating current output. The linear constant current controller of the present invention is capable of generating a pulsating output current that has rise and fall times in the tens of nanoseconds.
Before undertaking the Detailed Description of the Invention below, it may be advantageous to set forth definitions of certain words and phrases used throughout this patent document: the terms “include” and “comprise,” as well as derivatives thereof, mean inclusion without limitation; the term “or,” is inclusive, meaning and/or; the phrases “associated with” and “associated therewith,” as well as derivatives thereof, may mean to include, be included within, interconnect with, contain, be contained within, connect to or with, couple to or with, be communicable with, cooperate with, interleave, juxtapose, be proximate to, be bound to or with, have, have a property of, or the like.
Definitions for certain words and phrases are provided throughout this patent document, those of ordinary skill in the art should understand that in many, if not most instances, such definitions apply to prior uses, as well as to future uses, of such defined words and phrases.